Our European Patent Specification No. 0113516 which corresponds to U.S. Ser. No. 931,946 filed Nov. 20, 1986, the specification and drawings of which are the same or substantially the same as our U.S. Pat. Nos. 4,704,678 and 4,680,698, describes a microcomputer comprising a processor and memory for operating a plurality of concurrent processes. It permits outputting processes to output data and inputting processes to input data by use of communication channels. It permits descheduling of a current process and scheduling by adding a process to a collection awaiting execution. An inputting process may input through one of a number of alternative channels but the inputting process must be scheduled in order to test the state of the channels to find when an outputting process has reached a corresponding stage in its program.